1. Field of the Invention
The present invention relates to a method for forming a trench type element isolation structure to be used for a semiconductor integrated circuit and trench type element isolation structure.
2. Description of the Prior Art
In a semiconductor integrated circuit, in order to eliminate electric interference between the elements in operation and control each element in fully independent state, elements are isolated from one another. Especially, a trench type element isolation structure is a trench filled with an insulator and, as a bird's beak does not occur, it is an indispensable element isolation structure for making the semiconductor integrated circuit into miniature size.
FIGS. 13A-13F are sectional views of a method of forming a conventional trench type element isolation structure. First, as shown in FIG. 13A, an under-layer oxide film (first thermal oxidation film) 2 and a silicon nitride film 3 are sequentially deposited on a silicon substrate 1, after which, with a photolithographic pattern (not illustrated) used as a mask, silicon nitride film 3 and under-layer oxide film 2 are sequentially patterned to form a groove in silicon substrate 1.
Next, as shown in FIG. 13B, a thermal oxidation film 10 is formed on an inner wall of the groove by thermal oxidation, after which an imbedding oxide film 11 is laid over the whole surface by CVD step.
Next, as shown in FIG. 13C, the imbedded oxide film 11 formed on the upper part of the nitride film 3 by a CMP step using a silicon nitride film 3 as a stopper is eliminated to allow the imbedded oxide film 11 to remain only in the groove.
Next, as shown in FIG. 13D, the silicon nitride film 3 is eliminated by heated phosphoric acid, after which the CVD oxide film 20 is accumulated on the whole surface by CVD step.
Next, as shown in FIG. 13E, a CVD oxide film 20' is allowed to remain only on the side wall of the imbedded oxide film 11 by carrying out anisotropic etching.
Finally, as shown in FIG. 13F, by eliminating the under-layer oxide film 2 with hydrofluoric acid, a trench type element isolation structure is completed.
In a method of forming a trench type element isolation structure, it is essential to remove ultimately the under-laid oxide film 2 formed on the activated region 23. However, in the conventional structure trench type element isolation structure, the CVD oxide film 20' is formed by CVD and the etching speed in hydrofluoric acid is larger than that of the thermal oxidation film therefore, in removing under-laid oxide film 2 shown in FIG. 13F, the CVD oxide film 20' is also etched and, hence, fails to perform the function as protective film for the oxide film 11 imbedded in the groove. Thus, the imbedded oxide film 11 in the groove is also etched in the edge part, resulting in formation of a recess 21 on the edge part of the imbedded oxide film in the groove.
In an integrated circuit, as shown in FIG. 16, there may be a case where a gate electrode 22 is formed on said trench type element isolation to take a structure to control the transistor formed on the activated region 23 by said gate electrode 22. In such a case, due to the existence of the recess 21, the gate electrode 22 does not become smooth shape on the edge part of the trench but concentration of an electric field occurs, which may be a cause for the reverse narrow channel effect to show lowering of the threshold value of the transistor. Especially, as the integration of the semiconductor elements progresses and the width of the activated region 23 (gap between the adjacent trenches) becomes narrower, the effect of the reverse narrow channel effect becomes remarkable, thereby making it extremely difficult to control the threshold voltage of the transistor to give ill effect on the circuit operation.
Accordingly, the present invention has its object to provide a method for forming a trench type element isolation structure which is free from formation of recess in an edge part of a trench type element isolation imbedded oxide film.